Flash memory is widely used for peripheral storage in computer systems, and for primary storage in portable devices. NAND flash memory, invented by Dr. Fujio Masuoka of Toshiba in 1987, uses electrically-erasable programmable read-only memory (EEPROM) cells that store charge on a floating gate. Cells are typically programmed by an avalanche current, and then erased using quantum-mechanical tunneling through a thin oxide. Unfortunately, electrons may escape from the floating gate. Such leakage may cause data stored as charge on the floating gate of a flash-memory cell to be lost over time. Higher-density flash memory cells using newer technologies may exhibit a data-retention problem.
As the density and size of flash memory has increased, the cell size has been shrunk. The thickness of oxides including the tunneling oxide has also been reduced. The thinner oxides are more susceptible to leakage. This leakage may be slight and occur over long periods of time. For example, data may not be lost for weeks or years. If the flash cell is over-written before the retention period ends, the data is not lost. However, unlike DRAMs, merely reading a flash cell does not restore the cell charge. A flash write is necessary to refresh or restore the charge in a flash cell.
The retention time for flash cells has been decreasing as densities increase and oxide layer thicknesses decrease. If current trends continue, future flash memories may lose data in less than a week. Such a low retention could severely limit the applications that flash memory could be used for, and have severe impacts for Solid-State-Disk (SSD) applications.
One method to increase the density of flash memory is to store more than one bit per memory cell. Different voltage levels of the cell are assigned to different multi-bit values, such as four voltage ranges for a two-bit cell. However, the noise margins are reduced for the multi-level-cell (MLC) and TLC flash technologies and retention problems are exacerbated.
It is likely that the underlying flash technology will have lower retention in the future. Flash drives may compensate for the lower retention tolerance of the underlying flash memories by a variety of techniques. For example, a flash memory system may perform background operations to periodically move blocks of flash data to ensure that retention times are not violated. The flash memory may have a longer retention time when it is new (erase/write count is low). The retention time deteriorates as the erase/write count increased.
What is desired is a host software drivers and controllers for a flash drive that compensate for lower retention tolerances of the underlying flash memory devices. A Green NAND SSD Driver (GNSD) application and driver for a host connected to a standard Solid-State Drive (SSD) or a Super Enhanced Endurance Device (SEED) drive is desired that ensures data retention of the underlying flash memory. A GNSD driver that can ensure data retention on both standard SSD and SEED drives is desired.